发明名称 Disparity detection circuit for a 2-bit to 4-bit coded signal decoder
摘要 A disparity detection circuit used in a signal decoder which decodes a 4-bit signal into an original 2-bit main signal and 1-bit service signal, from which the 4-bit signal is coded according to a coding rule which stipulates that an original 2-bit main signal and 1-bit service signal should be coded into a 4-bit signal with 1 additional bit added and with pre-determined disparity carrying, determines whether the 4-bit signal conforms to the coding rule and detects the disparity of the 4-bit signal which is determined as conforming to the coding rule.
申请公布号 US5283576(A) 申请公布日期 1994.02.01
申请号 US19920876570 申请日期 1992.04.30
申请人 FUJITSU LIMITED 发明人 UMEGAKI, TAKASHI
分类号 H03M7/14;H03M13/00;H04L7/00;H04L25/49;H04N13/00;(IPC1-7):H03M7/00 主分类号 H03M7/14
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