| 摘要 |
PURPOSE:To compensate a deficiency of address bits in the whole access to a memory by outputting the high-order addresses of the memory together with time-division channel data or circuit discrimination data. CONSTITUTION:The low-order read address data RA are supplied on a time- division basis from a master tone generator or slave tone generator 106 to a ROM 107 and musical sound waveform data MW are read out on a time- division basis. In the latch of an extended address generator, the high-order read address data RA (timbre number) are set by the master CPU through a data bus 116, and the latch is selected according to a master/slave bit signal M/S indicating the distinction of a circuit and time-division channel number data. The high-order read address data RA are outputted through a selector in the division time of channels and a master/slave switching division time and supplied to the ROM 107 through the address bus 115. |
