| 摘要 |
PURPOSE:To reduce the interface signal lines between the first and second units, by setting the content of the upper rank digit of the clock circuit to the count circuit of a plurality of the second units, when the lower rank digit of the clock circuit of the first unit is a specific value. CONSTITUTION:In the information system consisting of the centralized monitor control unit CSC3 and a plurality of CPU4, the upper rank digit of the real time timer 2 of CSC3 is connected to the upper rank digit of the real time timer 1 of CPU 4 with the timer value supply line 15. To set the content of the timer 2 to the timer 1, it is made when the lower rank digit of the timer 2 is zero, and in this case, the zero detection circuit 7 delivers the signal 1 to the clock set instruction line 18 via the gate 13. When CPU4 is in stop state, the half state display FF9 is 1, the gate 14 is open, and the signal on the line 18 is delivered to the timer control circuit 10. When the circuit 10 delivers this information to the timer 1, the timer 1 sets the information on the line 15 to the upper rank digit and all 0 to the lower rank digit. Accordingly, since CSC supplies signals to CPU only at the upper rank digit of the real time timer, the interface between units can be reduced. |
