| 摘要 |
PURPOSE: To eliminate the effect of switch charge injection in the signal processing use circuit array where an electric signal is processed in a form of a sampled analog current. CONSTITUTION: Two cascade connection current memory cells (S1, T1, C1; S2, T2, C2) are provided with controllable bias current sources (T16, T17) and a control circuit 10 controlling the bias current sources (T16, T17) to activate the current memory cells with an optimum bias current. The control circuit 10 has two other current memory cells (S11, T11, C11; S12, T12, C12) connected in cascade and which are provided with two different current sources (T10, Y12) and a capacitor CX charged by an error current resulting from the switch charge injection, a voltage across the capacitor controls the current sources (T16, T17) and the other current sources (T14, T15) and an optimum bias current is produced by a control feedback loop provided with the other current sources (T14, T15) and the capacitor CX. |
