| 摘要 |
The present invention is directed to a chroma signal processing circuit for a single-chip color camera in which the level of a color aliasing signal generated when a signal having a vertical spatial frequency 1/2 Py becomes incident can be reduced considerably. In a single-chip color camera having a solid state imager capable of separately reading out image informations of all pixels and a color filter array having a color array pattern having a fundamental lattice in which two color filters are repeatedly formed in the horizontal and vertical directions and two color filters having the same spectral characteristic are provided within this unit lattice, the color filter array provided on the solid state imager, when primary color signals R, G and B are separated, then two kinds of primary color signals with respect to one primary color signal are generated for two color difference signals and an adding ratio of the two kinds of primary color signals is controlled in such a manner that the level of a sampling carrier generated in the vertical spatial frequency is minimized.
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