发明名称 FLOATING POINT ARITHMETIC SYSTEM
摘要 PURPOSE:To provide the floating point arithmetic system, which can execute multi-input arithmetic at high speed with a little hardware amount, concerning the floating point arithmetic system to perform operation processing including the addition and subtraction of a lot of data in a floating point form. CONSTITUTION:This system is provided with a multi-input adding/subtracting means to add/subtract over three floating point data, and this multi-input adding/subtracting means is provided with a multi-input means 10 to input over three floating point data, plural comparator circuits, and look-up table. Further, this system is provided with a shift amount deciding means 11 to decide the shift amount of mantissa parts in the respective floating point data by selecting the maximum exponent part of the floating point data, mantissa part shift means 12 to match digits by shifting the mantissa parts of the respective floating point data based on the decided shift amount, multi-input adder/subtracter 13 to add/subtract the digit matched mantissa parts, and normalizing circuit 14 to normalize this added/subtracted result.
申请公布号 JPH0612228(A) 申请公布日期 1994.01.21
申请号 JP19930088903 申请日期 1993.04.15
申请人 FUJITSU LTD 发明人 YOSHIZAWA HIDEKI;FUJIMOTO KATSUTO;OOTSUKA RIYUUJI
分类号 G06F7/00;G06F5/01;G06F7/485;G06F7/50;G06F7/508;G06F7/509;G06F7/527;G06F7/53;G06F7/76 主分类号 G06F7/00
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