发明名称 DATA SORTING METHOD AND CIRCUIT
摘要 The data arranging circuit of VTR or TV comprises; a synchronizing signal divider for dividing the horizontal synchronizing signal to receive the composite image signal; horizontal PLL generating the frequency locked in the horizontal synchronizing signal; A/D converter for generating the covered digital composite image signal the sampling frequency generated from the horizontal PLL; a burst divider for dividing the color burst signal to receive the composite signal; a burst PLL for generating the sampling frequency locked at the color burst signal; and line memory for memoring the digital composite image signal by the sampling frequency generated from the horizontal PLL and receiving the sampling frequency generated from the burst PLL.
申请公布号 KR940000466(B1) 申请公布日期 1994.01.21
申请号 KR19910001458 申请日期 1991.01.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JONG, TAE - HONG
分类号 H04N7/08;(IPC1-7):H04N7/08 主分类号 H04N7/08
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