SINGLE-STACK IMPLEMENTATION OF A REED-SOLOMON ENCODER/DECODER

摘要

An error correction unit (20, 22, 24) using a single stack architecture (24, 40, 42, 44) plus evaluation logic (46) for generating, reducing and evaluating polynomials involved in correction with a Reed-Solomon code is disclosed. The same hardware is sequentially used to generate the syndromes, and to reduce and evaluate the error locator polynomial ((Omega)0, (Omega)1, ..., (Omega)15) and the error evaluator polynomial (Ÿg(L)0, Ÿg(L)1, ..., Ÿg(L)15). A method of generating the error locator and error evaluator polynomials includes aligning the polynomials prior to evaluation. Corrections are performed on bytes in the same order as they are received. The unit is data driven in that no calculations are performed if no data is present. A method for implementing flags for uncorrectable errors is disclosed. A Galois field multiplier implementation (38, 56) and a Galois field inverse function design (36) are disclosed.