| 摘要 |
<p>A method is described for determining readiness of devices in a digital data bus system to transfer data signals. The bus system includes a bus (10) having a clock line (23) for communicating a clock signal (61), address lines (26) for communicating address signals (27), data lines (24) for communicating data signals (25), and control lines (28) for communicating control signals. The bus system also includes a plurality of devices (14). Each device is connected to the bus and has an address on the bus. At least one device is a source device capable of sending data signals and at least one device is a destination device capable of receiving data signals. A bus controller (12) connects to the bus and controls the bus. The control lines include bus request lines that connect each device to the bus controller for communicating a bus request signal from a device to the bus controller. The bus request signal indicates that the device is ready to send or receive data signals. The bus controller includes matching logic (80) that stores the identities of predetermined pairs of a source device and a destination device between which matching logic will permit the transfer of data signals. The matching logic receives the bus request signals and determines based on the bus request signals whether a particular allowed pair of source and destination devices are ready to send and receive data signals. According to the method, a source device generates a bus request signal on the bus request lines indicating whether the source device is ready to send data signals on the data lines. Next, a destination device generates a bus request signal on the bus request lines indicating whether the destination device is ready to receive data signals on the data lines. Finally, the matching logic receives the bus request signal generated by the source device and the bus request signal generated by the destination device and, provided the pair of destination and source device are a pair allowed to transfer data signals, decides based on the received bus request signals whether the pair of the destination and source devices is ready to send and receive data signals. <IMAGE></p> |
