发明名称 |
Computer system maintaining data consistency between the cache and the main memory. |
摘要 |
<p>To effectively execute the cache consistency operations that is executed when an I/O device accesses the main memory. A computer system comprises a processor (1), a cache memory (2) of this processor, a main memory (4), an I/O device (6) directly accessible to this main memory, an I/O controller (7), and the like. It is made so that the I/O controller can execute processing to retain data consistency between the cache memory and the main memory during access to the main memory by the I/O device. The I/O controller has an address buffer (9) that retains the cache line address of the previous access by the I/O device and it is made so that the consistency maintenance operation is not executed in cases other than the first access when accesses to the main memory by the I/O device are made continuously in the same data block. <IMAGE></p> |
申请公布号 |
EP0579418(A2) |
申请公布日期 |
1994.01.19 |
申请号 |
EP19930305156 |
申请日期 |
1993.07.01 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
OBA, NOBUYUKI;SHIMIZU, SHIGENORI |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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