发明名称 |
Method of testing individual dies on semiconductor wafers prior to singulation |
摘要 |
A method of processing and testing a semiconductor wafer containing an array of integrated circuit dies comprises: a) providing die test cycling circuitry on the wafer b) etching contact openings through a passivation layer atop the wafer to Vcc and Vss pads associated with individual dies; c) patterning a layer of conductive material atop the water to provide a Vcc bus and a Vss bus which interconnect with the Vcc and Vss pads respectively, the Vcc bus electrically connecting with the test cycling circuitry; d) burn-in testing the wafer with selected voltages being applied to the Vss and Vcc buses e) etching the Vcc bus and Vss bus from the wafer; f) etching contact openings through the passivation layer to conductive pads on individual dies; g) testing the individual dies for operability by engaging the conductive pads with testing equipment; h) identifying operable dies; i) singulating the dies; and j) collecting the operable dies.
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申请公布号 |
US5279975(A) |
申请公布日期 |
1994.01.18 |
申请号 |
US19920832785 |
申请日期 |
1992.02.07 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
DEVEREAUX, KEVIN M.;BUNN, MARK;HIGGINS, BRIAN |
分类号 |
G01R31/28;H01L21/66;(IPC1-7):H01L21/66;H01L21/60 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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