发明名称 Logic support chip for AT-type computer with improved bus architecture
摘要 A support chip includes substantially all the AT core logic, namely most of the X-bus peripherals (except for the keyboard controller), memory controllers, and swapper. The normal AT data paths are altered to reduce the pin count, with a resulting surprising improvement in capability. The chip interfaces to the microprocessor's local address and data buses and provides a 16-bit data bus corresponding to a 16-bit version of the X-bus data portion (XD-bus). External buffers coupled to the XD-bus provide a system data bus (SD-bus) corresponding to the S-bus data portion. The I/O channel is coupled to the SD-bus while system ROM is coupled to the XD-bus. To accommodate the fact that the swapper is internal, the support chip provides independent direction control of the high and low order buffers between the XD-bus and the SD-bus.
申请公布号 US5280590(A) 申请公布日期 1994.01.18
申请号 US19920902317 申请日期 1992.06.22
申请人 CHIPS AND TECHNOLOGIES, INCORPORATED 发明人 PLEVA, ROBERT M.;CATLIN, ROBERT W.
分类号 G06F13/40;(IPC1-7):G06F12/06;G06F13/36 主分类号 G06F13/40
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