发明名称 Semiconductor memory device enabling change of output organization with high speed operation
摘要 A semiconductor memory device enabling change of the output organization has a plurality of memory cell array portions each having a plurality of memory cells for storing data, a plurality of data buses for transferring data, a plurality of sense amplifiers for sensing data of a selected memory cell of the memory cell array portions, and a plurality of output gates connected to the sense amplifiers. At least two of the sense amplifiers are connected to each of the memory cell array portions through the data buses, respectively. The selection of the sense amplifiers is controlled to be activated or deactivated by control signals, to thereby change the output organization. Therefore, a delay in data transmission can be eliminated, and a high speed operation can be realized.
申请公布号 US5280456(A) 申请公布日期 1994.01.18
申请号 US19920944953 申请日期 1992.09.15
申请人 FUJITSU LIMITED 发明人 OKAJIMA, YOSHINORI;SATO, YOSHIHIDE;KAMATA, SHINNOSUKE
分类号 G11C11/41;G11C7/00;G11C7/10;G11C11/401;G11C11/409;G11C11/419;(IPC1-7):G11C7/00 主分类号 G11C11/41
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