发明名称 PACKET COMMUNICATION DEVICE AND COMMUNICATION SYSTEM
摘要 PURPOSE:To prevent an image and a speech from deteriorating in quality by providing a variable frequency dividing circuit, varying the frequency division ratio according to a carry signal, and controlling the timing of the input and output of media with the output frequency. CONSTITUTION:Packet data which are sent out to a packet network 26 are inputted to receiving station packet buffers 20 and 21 and stored. Pieces of flag information sent out of an overflow flag generating circuit 19 and an underflow generating circuit 22 attached to the buffers 20 and 21 are ORed by OR circuits 17 and 18. Their OR outputs are inputted to an up/down counter 16 to accumulate errors of clock frequencies of a receiving circuit and transmitting circuits through the function of the counter 16, and the frequency division ratio of the variable frequency dividing circuit 15 is controlled with its carry signal. Further, the timing of the input and output of the respective media is controlled with the output frequency of a circuit 13, and then the image and speech can be transferred even by using the packet network of an independent synchronization system.
申请公布号 JPH066382(A) 申请公布日期 1994.01.14
申请号 JP19920164594 申请日期 1992.06.23
申请人 HITACHI LTD 发明人 MIYAMOTO YOSHINORI;ABE MUTSUMI;KAMEYAMA TATSUYA
分类号 H04L7/00;H04L12/42;H04L12/70;H04L12/885 主分类号 H04L7/00
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