发明名称 RECEPTION CIRCUIT FOR START-STOP SYSTEM COMMUNICATION
摘要 <p>PURPOSE:To obtain a reception circuit for the start-stop system communication able to receive surely serial data when a setting of a character bit length is larger than that at a sender side. CONSTITUTION:The reception circuit is provided with a processing circuit 1 for reception clock and input serial data and an input signal T1 being external serial communication data is inputted to the circuit 15, the input signal is processed and outputted to a start bit detection/shift clock generating circuit 10 and a shift circuit 11 as a signal S7 and the circuit 15 receives a clock CLK and a clock CLK2 whose frequency is four times the frequency of the clock CLK and processes the clock signals and outputs the processed clocks to the start bit detection/shift clock generating circuit 10 as the CLK1. The signal S7 is serial communication data to which a virtual stop bit is added.</p>
申请公布号 JPH066341(A) 申请公布日期 1994.01.14
申请号 JP19920157942 申请日期 1992.06.17
申请人 SHARP CORP 发明人 KAJIKAWA YUUKI;DATE KAZUHARU;MUROOKA FUMIO;MIKAMI HIROSHI
分类号 H04L7/04;H04L25/40;H04L29/02;(IPC1-7):H04L7/04 主分类号 H04L7/04
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