Semiconductor memory device with dummy cycle operation

摘要

A semiconductor memory device capable of internally generating a dummy cycle includes circuits for generating dummy cycle designation signals in response to at least one of predetermined external control signdlsircuits for generating a dummy cycle signal predetermined times in response to the output signal of such circuits. The dummy cycle signal drives a desired internal circuit. The internal and automatic generation of a dummy cycle signal allows a circuit in addition to an RAS related circuit to execute a dummy cycle. As a result, a semiconductor memory device having multi-function is allowed to reliably initialize a desired internal circuit without designing complicated timing and providing additional pin terminals.