Microprocessor system including a cache controller which remaps cache address bits to confine page data to a particular block of cache

摘要

A cache controller for a set associative cache selectively remaps predetermined bits of the cache address so as to confine data from a single memory page to a particular block of the cache memory. When changing a memory page, only the particular block of the cache in which data from that page may be stored is flushed, thereby preserving the remaining contents of the cache.