A monitor circuit.

摘要

A monitor circuit comprises a data storage having a dummy data stored therein, buffer circuit connected to the output of the data storage, coincidence circuit for compairing the data on the I/O bus connected between the buffer circuit and I/O units with the dummy data of the data storage, and flag circuit for setting an abnormal flag responsive to the non-coincidence output from the coincidence circuit. During the I/O refresh of a PC such abnormal flag is set due to the disturbance of the I/O bus. The I/O refresh is repeatedly performed in the event the flag is set.