Semiconductor device with low ON resistance - has groove in layer surface, and second conductivity layer(s) with exposed surface

摘要

The device includes a groove (9) formed in the top surface of a first semiconductor layer (1) of a first conductivity type. At least one second semiconductor layer (2) of a second conductivity type has its surface exposed selectively on the top surface of the first semiconductor layer such that between them is a defined boundary line, orthogonal to the longitudinal direction of the groove. At least on the top of the groove surface a control insulating layer (4) is formed, on which a control electrode (5) is deposited. Pref. the second semiconductor layer is selectively formed in the top surface of the first semiconductor layer, e.g. in the form of a strip. Alternately several grooves in mutually parallel configuration may be formed. USE/ADVANTAGE - For Vertical Double Diffusion MOS components, with low ON resistance, without influencing holding voltage in OFF state.