发明名称 |
Shared two level cache including apparatus for maintaining storage consistency |
摘要 |
A multilevel cache buffer for a multiprocessor system in which each processor has a level one cache storage unit which interfaces with a level two cache unit and main storage unit shared by all processors. The multiprocessors share the level two cache according to a priority algorithm. When data in the level two cache is updated, corresponding data in level one caches is invalidated until it is updated.
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申请公布号 |
US5276848(A) |
申请公布日期 |
1994.01.04 |
申请号 |
US19910750430 |
申请日期 |
1991.08.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GALLAGHER, PATRICK W.;GREGOR, STEVEN L.;REEVE, STEPHEN M. |
分类号 |
G06F12/08;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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