| 摘要 |
A receiver for receiving data signals which include data symbols C(k) having a symbol Baud rate. A local oscillator generates a local Baud rate clock for sampling a received signal, a symbol detector recovers the symbols C(k) from the signal samples, and an arithmetic processor circuit derives for each sample an error signal e(k) which is a measure of the phase difference between the local Baud rate clock and the symbol Baud rate clock of the received signal. A reference circuit generates a reference signal Vr(k) which is proportional to the amplitude of the received symbols. The receiver further includes a control circuit (11) for forming from the signals C(k), e(k) and Vr(k) a pair of control signals (Delta)F and (Delta)(phi) which adjust the frequency and phase of the clock oscillator so as to reduce the aforesaid phase difference. In order to avoid phase and frequency oscillations due to such adjustment, the frequency of the clock oscillator is maintained unchanged when the absolute value of the clock phase difference is decreasing, or is changed so as to slow down such decrease.
|
