| 摘要 |
PURPOSE:To enhance the high frequency and high withstand voltage characteristics of a field effect transistor without increasing the area of the transistor by forming an N<->-type semiconductor substrate as a drain, a P-type semiconductor region as the second gate, an electrode on an insulating film on a P-type region as the first gate, and an N<+>-type region as a source. CONSTITUTION:Two P-type regions 8 are formed on the upper surface of an N<->- type semiconductor substrate 7, an N<+>-type region 12 is formed on the upper surface of the region 8, and an N-type region 9 is formed on the upper surface of the substrate 7 between the regions 8. An electrode 11 is then coated through an insulating film 10 on the upper surface of the regions 8 between the regions 9 and 12. Then, there are obtained an FET-1 having the region 12 as a source S, the electrode 11 as a gate G1, the region as a gate G2, and the region 9 as a drain, an FET-2 having the region between the regions 8 as a drain, the region 9 as a channel, the region 8 as a gate G2, and an FET-3 having the region 9 as s source, the region between the regions 8 as a channel, the region 8 as a gate G2, and the substrate 7 as a drain D in cascade connection. Thus, it can improve the high freuqency and high withstand voltage characteristics thereof without increasing the area of the transistor. |
