发明名称 |
DEVICE FOR HIGH EFFICIENCY ENCODING AND DECODING OF PICTURE SIGNALS AND RECORDING MEDIUM |
摘要 |
To realize a high picture quality with a small information volume, to reduce the hardware scale and to reduce the capacity of the frame buffer of a decoder. A limitation mode decision circuit 34 adaptively changes over a mode of inhibiting interframe predictive coding over the entire macro-blocks in each slice to a mode of inhibiting interfield predictive coding in a frame being encoded over the entire macro-blocks in one slice. As for a B-frame, prediction from its odd field to its even field is inhibited, while prediction from an odd field, such as an Io field, of a reference frame of forward prediction ia also inhibited.
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申请公布号 |
CA2099175(A1) |
申请公布日期 |
1993.12.30 |
申请号 |
CA19932099175 |
申请日期 |
1993.06.25 |
申请人 |
SONY CORPORATION |
发明人 |
IGARASHI, KATSUJI;YONEMITSU, JUN;YAGASAKI, YOICHI;FUJINAMI, YASUSHI;SATO, TOMOYUKI;KATO, MOTOKI;SUZUKI, TERUHIKO |
分类号 |
H04N7/24;G06T9/00;H04N7/26;H04N7/36;H04N7/46;H04N7/50;(IPC1-7):H04N7/137;H04N5/76;H04N7/133;H04N5/14 |
主分类号 |
H04N7/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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