发明名称 Serial access memory with column address counter and pointers.
摘要 <p>A serial access memory has multiple memory blocks, each with a row-and-column array of memory cells for storing data. Data access is synchronized with a clock signal. A column address counter counts the clock signal to generate a column address. A block selector decodes upper bits of the column address to generate a series of block select signals, which are distributed to the memory blocks. In each memory block a shift register receives and shifts one block select signal to generate a series of column select signals. &lt;IMAGE&gt;</p>
申请公布号 EP0575829(A2) 申请公布日期 1993.12.29
申请号 EP19930109309 申请日期 1993.06.09
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 IWAKIRI, ITUROU;MURAKAMI, KOJI
分类号 G11C8/04;G06F5/16;G11C11/401;(IPC1-7):G11C8/04;G11C7/00 主分类号 G11C8/04
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