发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To avoid the yield and the breakdown of an output transistor TR by halving the reverse bias caused between the base and the emitter of the output TR. CONSTITUTION:A 3rd npn-type output TR 27 includes a collector connected to the output X with an emitter and a base connected to a lower potential power supply Vss and a node N2 respectively. A forcible setting means 10 forcibly sets the 1st and 2nd nodes N1 and N2 at low levels in response to a prescribed control signal C. In such a constitution of an output buffer, the 1st-3rd output TR (25, 26 and 27) are all turned off. Furthermore, a cutting means 42 is added to the output buffer to cut the connection secured between the emitter of the TR 25 and the power supply Vss while both nodes N1 and N2 are kept at low levels.
申请公布号 JPH05347548(A) 申请公布日期 1993.12.27
申请号 JP19920154989 申请日期 1992.06.15
申请人 FUJITSU LTD 发明人 SAKANO KOJI;INOUE TAKEYUKI
分类号 H03K17/08;H03K17/66;H03K19/0175 主分类号 H03K17/08
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