发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To prevent the reading of error data by a sense amplifier by easily adjusting the increasing amounts of the potential of a bit line through a dummy capacity due to the selection of a pseudo word line without adjusting the capacity value of the pertinent dummy capacity. CONSTITUTION:A sense amplifier SA is connected between a pair of bit lines BL and the inverse of BL, and a storage cell Cm is connected between either the bit line BL or the inverse of BL and a word line WL. A word line driving circuit WD which operates at the time of selecting the pertinent word line Wl, is connected with the word line WL, and a dummy capacity DC is connected between either the bit line BL and the inverse of BL, and a pseudo word line DWL making a pair with the word line WL. The pseudo word line DWL is connected through an output level adjusting circuit 1 with a pseudo word line driving circuit DWD which operates synchronously with the word line driving circuit WD, and which selects the above mentioned pseudo word line DWL.
申请公布号 JPH05342853(A) 申请公布日期 1993.12.24
申请号 JP19920152453 申请日期 1992.06.11
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 NOMURA HIDENORI;KANI YASUSHI;KAKIZAWA NOBUYUKI
分类号 G11C11/401;G11C11/407;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/401
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