发明名称 EXCLUSIVE OR/EXCLUSIVE NOR LOGIC CIRCUIT
摘要 PURPOSE:To improve the degree of integration of a semiconductor integrated circuit by reducing the number of circuit components. CONSTITUTION:An input A is imparted to an input terminal of a CMIS inverter 20 comprising a PMIS transistor(TR) TP1 and an NMIS TR TN1, gates of an NMIS TR TN2 and a PMIS TR TP2 are connected in common and an input B is fed to the connecting point. Then an input terminal and an output terminal of the CMIS inverter 20 are connected in common respectively via the PMIS TR TP2 and the NMIS TR TN2 and an output X is extracted from the connecting point. With the input B set to a level, the TN2 is turned on and the TP2 is turned off, the output X is equal to the inverted input A by the CMIS inverter 20 and when the input B is set to 0, the TN2 is turned off and the TP2 is turned on and the output X equal to the input A. Thus, the output X is exclusive OR of the inputs A, B.
申请公布号 JPH05343985(A) 申请公布日期 1993.12.24
申请号 JP19920145300 申请日期 1992.06.05
申请人 FUJITSU LTD 发明人 KAWAMURA SHOICHI
分类号 H03K19/21;(IPC1-7):H03K19/21 主分类号 H03K19/21
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