发明名称 SYNTHESIZER OSCILLATION CIRCUIT
摘要 PURPOSE:To obtain a more stable frequency signal even with low modulation sensitivity and to enable an oscillating frequency control range of a VCO to narrow. CONSTITUTION:An output of a reference frequency signal from an oscillator 1 is subject to 1/R frequency division by a 1/R counter 2. A frequency signal from a voltage controlled oscillator 6 is subject to 1/M frequency division by a 1/M counter 3. An output of the 1/R counter 2 and an output of the 1/M counter 3 are phase-compared by a phase comparator 4, a loop filter 5 eliminates a high frequency component to generate a control voltage for a voltage controlled oscillator 6. An output of the voltage controlled oscillator 6 is further subject to 1/N frequency division by the 1/N counter 7 to obtain an optional frequency signal. In this case, a code converter 8 is used to control each of frequency division ratios R, M, N of the 1/R counter 2, the 1/M counter 3 and the 1/N counter 7 in response to the coded frequency control signal.
申请公布号 JPH05343990(A) 申请公布日期 1993.12.24
申请号 JP19920151048 申请日期 1992.06.11
申请人 NEC ENG LTD 发明人 IMAEDA YOSHITERU
分类号 H03L7/10;H03L7/187 主分类号 H03L7/10
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