发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To raise accuracy in resistance by correcting an irregularity in a resistivity of a polycrystalline silicon at the time of exposing a resistor pattern in a method for manufacturing a semiconductor integrated circuit device using a polycrystalline silicon resistor. CONSTITUTION:A system controller 1 of an exposure unit has, in addition to a shot map, alignment data, mapping data of a sheet resistance (rhoS) of a substrate 7, level-divides exposure conditions of chips in the substrate 7 and sends data of the exposure conditions to a firing circuit I/F 12, an actuator I/F 4 through a data bus 3. Accordingly, since an exposure time in the same substrate can be controlled at each one shot, a width of the resistor can be altered at each one chip, and resistance values become uniform at the respective positions on the substrate.
申请公布号 JPH05343280(A) 申请公布日期 1993.12.24
申请号 JP19920150181 申请日期 1992.06.10
申请人 NEC CORP 发明人 AKIYAMA OSAMU
分类号 H01L21/30;H01L21/027;H01L21/822;H01L27/04;(IPC1-7):H01L21/027 主分类号 H01L21/30
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