| 摘要 |
PURPOSE:To output data in series by generating signals required for operation of first and second aerial/parallel conversion circuits, an m-bit counter, and a parallel/serial conversion circuit with asynchronous load. CONSTITUTION:One-bit data is converted to plural n-bit data by a first serial/ parallel conversion circuit 2, and a one-bit address is converted to plural n-bit addresses by a second serial/parallel conversion circuit 3. The loaded value of the second serial/parallel conversion circuit 3 is counted by an m-bit counter 4, and a k-bit value is converted to one bit by a parallel/serial conversion circuit 5 with asynchronous load. Signals required for operation of first and second serial/parallel conversion circuits 2 and 3, the m-bit counter 4 with asynchronous load, and the parallel/serial conversion circuit 5 with asynchronous load are generated by a control circuit. |
