发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To perform reduction processing by thinning out display data with no delay of display processing without depending upon software. CONSTITUTION:A bus 20 is connected to a CPU and supplies a chip select signal and an address strobe signal to a display system and also supplies an address and display data as well. The display system returns an ACK signal indicating the end of access to the bus 20. A subcontroller 11 processes and transmits an address to be sent to a buffer memory 12, a synchronizing signal, a CPU cycle for reading and writing display data through the bus 20, a refreshment cycle for refreshing the buffer memory 12, and a transfer cycle for transferring display data in the buffer memory 12.
申请公布号 JPH05333829(A) 申请公布日期 1993.12.17
申请号 JP19920137230 申请日期 1992.05.28
申请人 SHARP CORP 发明人 OMORI TAKUO
分类号 G06F3/153;G06T3/40;G09G5/00;G09G5/02;G09G5/18;G09G5/36;H04N1/393;(IPC1-7):G09G5/00;G06F15/66 主分类号 G06F3/153
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