| 摘要 |
<p>PURPOSE:To automatically specify an abnormal part by comparing frequencies of outputs of a dual clock to specify the frequency abnormal part. CONSTITUTION:Outputs of dual clock reception circuits 1a, 1b and inputs of phase synchronizing circuits 2a, 2b are cross-connected. That is, the output of the circuit 1a is connected to circuits 2a and 2b to select the circuit 1a or 1b by switches in circuits 2a and 2b. Correspondingly to this connection, a phase comparing circuit 3d compares phases of circuits 1a and 2b with each other, and a phase comparing circuit 3e compares phases of circuits 1b and 2a with each other. Then, frequency abnormality in one or two of circuits 1a, 1b, 2a, and 2b is specified. If abnormality occurs, all of output signal groups of circuits 3d and 3e have different patterns, and a discriminating circuit 4b outputs a signal, which specifies the abnormal part, in the case of frequency abnormality up to double.</p> |
