发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To improve manufacturing yield of the semiconductor memory device by separating the I/O block incapable of relief by ordinary redundant circuit system and operating the device as the semiconductor memory device without an error check bit in the semiconductor memory device with an error check bit. CONSTITUTION:An input/output switching circuit 7 is provided between I/O blocks 30a-30i and I/O pads 6a-6i. The input/output switching circuit 7 comprises fuse elements 10a-10i connected in series and switching elements 8a-8b deciding a connection path between I/O blocks 30a-30i and I/O pads 6a-6i responding to the potential on one ends of the fuse elements. When all of the fuse elements are in a conduction state, the switching elements 8a-8b connect the I/O blocks 30a-30i to the I/O pads 6a-6i with a one-to-one correspondence. When one of the fuse elements is cut, the switching elements 8a-8b separate the correspondent defective I/O block from the I/O pad and change the connection path of each I/O block to the pad direction corresponding to the defective I/O block.
申请公布号 JPH05334898(A) 申请公布日期 1993.12.17
申请号 JP19920141146 申请日期 1992.06.02
申请人 MITSUBISHI ELECTRIC CORP 发明人 MORI SHIGERU
分类号 G11C11/401;G11C29/00;G11C29/04;G11C29/42;(IPC1-7):G11C29/00 主分类号 G11C11/401
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