发明名称 INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To store the data in a cache memory in a reset state. CONSTITUTION:When a reset switch 210 is pushed, an MPU 220 sets (turns on) '1' to the reset previous announcement bit stored in a reset register 121 of a BPU 100. When the ON state of the announcement bit is confirmed, an MPU 110 saves the data stored in a cache memory 130 to a main memory 300. When this saving of data is completed, the MPU 110 clears the announcement bit to set it at '0' (to turn off it). An SVP 200 detects a fact that the previous announcement reset bit is turned off. The MPU 220 also detects the OFF state of the previous announcement reset bit and then turns on the forcible reset bit of the register 121. The MPU 110 of a BPU 100 detects a fact that the forcible reset bit is turned on. Thus, the BPU 110 performs the reset processing.
申请公布号 JPH05333964(A) 申请公布日期 1993.12.17
申请号 JP19920139110 申请日期 1992.05.29
申请人 HITACHI LTD 发明人 TANAKA TAKAAKI;NAKAMURA AKIHISA;MIYAZAKI YOSHIHIRO;FUKUMARU HIROAKI;TAKATANI SOICHI;ISHIHARA TOSHIO
分类号 G06F1/24;G06F12/08 主分类号 G06F1/24
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