| 摘要 |
The circuit generates control signals when error signal is above an error limitation and determines error limitation of frequency and duty error in the alternative two square waves. The circuit includes a 1st counter (20) for counting the clock of a specified period, a 2nd counter (30) for counting the clock of a specified period in the low voltage of square wave, an error display unit (40) for displaying the error, an absolute period decision and period error allowing logic unit (50), a decision signal saving unit (60), and a normal display unit (90).
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