发明名称 INTER-PROCESS DELAY TIME ARITHMETIC UNIT
摘要 <p>PURPOSE:To properly string together the event information on the precedent and next processes despite the occurrence of such a case where the event occurring sequence is not protected from the inter-process delay time. CONSTITUTION:An inter-process delay time computing device calculates the inter-process delay time to string together the event information on each process. The inter-process delay time is calculated based on at least the inter-process in-process value and the moved variable per unit time by an inter-process delay time computing means 12. When the event information on each process are actually stringed together based on the inter-process delay time, a stringing deciding means 13 decides whether the stringing processing is proper or not. If so, an inter-process delay time resetting means 14 calculates the new inter- process delay time based on the precedent inter-process delay time and the event information sampling cycle and then newly string together the event information on each process.</p>
申请公布号 JPH05324972(A) 申请公布日期 1993.12.10
申请号 JP19920123317 申请日期 1992.05.15
申请人 TOSHIBA CORP 发明人 YOSHIZAKI TAKASHI
分类号 B23Q41/00;G05B19/418;G07C3/00;(IPC1-7):G07C3/00 主分类号 B23Q41/00
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