发明名称 ERROR DETECTING AND CORRECTING CIRCUIT
摘要 <p>PURPOSE:To end an error detecting and correcting processing within a fixed time also for many transmission errors. CONSTITUTION:A data reproducing circuit 32 reproduces inputted information data and the error detecting and correction code. The reproduction data are written in a data memory 34. A syndrome calculating circuit 36 calculates a syndrome from the output of the data reproducing circuit 32, and writes it in a syndrome memory 38. An error processing circuit 40 detects and corrects the error of the information data of the data memory 34 by referring to the syndrome memory 38. The error processing circuit 40 is operated by the 2 error detection and 2 error correction at first, and counts-up a correction counter 42 each time the 2 error correction is operated. When the correction counter 42 is more than a prescribed value, the error processing circuit 40 is operated with the 2 error detection and 1 error correction.</p>
申请公布号 JPH05327523(A) 申请公布日期 1993.12.10
申请号 JP19920125034 申请日期 1992.05.18
申请人 CANON INC 发明人 KARASAWA KATSUMI
分类号 G06F11/10;G11B20/18;H03M13/00;H03M13/15;H04L1/00;H04N7/24;H04N19/00;H04N19/102;H04N19/134;H04N19/196;H04N19/423;H04N19/46;H04N19/65;H04N19/67;H04N19/70;(IPC1-7):H03M13/00;H04N7/13 主分类号 G06F11/10
代理机构 代理人
主权项
地址