| 摘要 |
PURPOSE:To reduce the HOL blocking with a small quantity of hardware by providing the packet buffers against the input circuits and at each cross point and securing the connection between these buffers and circuits via the internal signal lines to perform the packet transfer control. CONSTITUTION:The packet buffers 121-12n are provided against the input circuits 211-21n respectively, and the packets of the fixed length are exchanged via a space switch 11 where N pieces of in-circuits and M pieces of out-circuits are arranged in a lattice shape. Meanwhile the packet buffers 1311-13nm are provided at the cross points forming the switch 11, and the control signal lines 231-23n are set between the buffers 121-12n and 1311-13nm for transfer of the control signals. When the connection requests are received from the buffers 121-12n while the buffers 1311-13nm are congested, the congestion information is transmitted and the transfer of packets is stopped. Thus the HOL blocking can be reduced with a small quantity of hardware without causing any high speed operation in the switch 11. |
