CLOCK EXTRACTION CIRCUIT FOR FIBER OPTICAL RECEIVERS

摘要

A circuit for regenerating a clock signal from an NRZ encoded signal. The NRZ signal is filtered, differentiated, and applied to a nested phase-locked loop. The main loop of the phase-locked loop includes a voltage controlled crystal oscillator. The inner loop of the nested phase-locked loop includes a voltage controlled oscillator which multiplies the frequency of the signal provided by the crystal oscillator to obtain the regenerated clock signal. Tunable low pass filters are used in the differentiating circuit as delay elements. The voltage controlled oscillator includes a tunable low pass filter and an integrator. The control voltage for the inner loop voltage controlled oscillator is used to control the low pass filters of the differentiating circuit in a frequency locked loop.