| 摘要 |
A computer system includes a processor and bus logic, a decode logic circuit for the processor and bus logic access, a memory subsystem and at least one output port. Writes by the processor and bus logic to an output port also update corresponding location in memory through the decode logic. In one arrangement, a logical "OR" gate enables the memory in response to an output of the decode logic for activating the memory subsystem or an output of the decode logic for activating the output port.
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