发明名称 |
Semiconductor integrated circuit capable of compensating errors in manufacturing process |
摘要 |
The gate of a first P-channel transistor of a first comparator is supplied with an input signal, and the gate of a second P-channel transistor of the first comparator is supplied with a reference voltage. An output terminal of the first comparator is connected to an output circuit and the gates of first and second P-channel transistors of a second comparator are supplied with the reference voltage. The second comparator outputs a voltage equal to a stand-by time output voltage of the first comparator and the output voltage from the second comparator is supplied to the non-inversion input terminal of a third comparator which is connected to a voltage generating circuit. The voltage generating circuit has substantially the same dimension ratio as the output circuit and generates a voltage equal to the threshold voltage of the output circuit. A third comparator controls the first P-channel transistors of the first and second comparators in accordance with a difference voltage between the output voltage of the second comparator and the output voltage of the voltage generating circuit to thereby automatically set a stand-by time output voltage of the first comparator at a value close to the threshold of the output circuit.
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申请公布号 |
US5268872(A) |
申请公布日期 |
1993.12.07 |
申请号 |
US19910766404 |
申请日期 |
1991.09.27 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
FUJII, SHINJI;KURODA, TADAHIRO;MATSUO, KENJI;HIRATA, AYAKO;KASAI, KAZUHIKO;FUKUNAGA, TOSHIYUKI;KIMURA, MASAHIRO |
分类号 |
G11C11/41;G11C7/06;G11C8/18;G11C11/409;G11C11/419;H03K5/02;H03K5/08;H03K5/1532;H03K5/24;H03K17/04;(IPC1-7):G11C7/00;H03K5/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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