发明名称 |
Semiconductor memory device |
摘要 |
The present invention provides a semiconductor memory device capable of reducing its current consumption, controlling the generation of noise, and increasing in access using a precharge voltage applied to a precharge circuit. In the semiconductor memory device, a precharge circuit is connected to a pair of data input/output lines, and includes a MOS transistor connected between one of the data input/output lines and a node of a precharge voltage and a MOS transistor connected between the other data input/output line and a node of the precharge voltage. The gates of the MOS transistors are supplied with control signals so that the MOS transistors are turned on when the data input/output lines are precharged. A MOS transistor is connected to the data input/output lines for equalizing them. The precharge voltage is set to half of a value obtained by subtracting the threshold voltage of the MOS transistor from the power supply voltage.
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申请公布号 |
US5268867(A) |
申请公布日期 |
1993.12.07 |
申请号 |
US19920957001 |
申请日期 |
1992.10.06 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
MOMODOMI, MASAKI;ITOH, YASUO;IWATA, YOSHIHISA;TANAKA, TOMOHARU;TANAKA, YOSHIYUKI |
分类号 |
G11C11/409;G11C5/14;G11C7/10;G11C16/06;G11C16/20;G11C16/26;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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