发明名称 Logic structure and circuit for fast carry
摘要 Programmable logic devices which include multiple blocks of combinatorial function generators and storage elements, and which are interconnected by a programmable interconnect structure are used, among other things for performing arithmetic functions which use logic for generating the carry function. When a large number of bits is to be processed, the carry function typically causes significant delay or requires significant additional components to achieve a result at high speed. The present invention provides dedicated hardware within the logic blocks for performing the carry function quickly and with a minimum number of components. The invention takes advantage of the fact that a carry signal to be added to two bits can be propagated to the next more significant bit when the two binary bits to be added are unequal, and that one of the bits can serve as the carry signal when the bits are equal.
申请公布号 US5267187(A) 申请公布日期 1993.11.30
申请号 US19920944002 申请日期 1992.09.11
申请人 HSIEH, HUNG-CHENG;CARTER, WILLIAM S.;ERICKSON, CHARLES S.;CHEUNG, EDMOND Y. 发明人 HSIEH, HUNG-CHENG;CARTER, WILLIAM S.;ERICKSON, CHARLES S.;CHEUNG, EDMOND Y.
分类号 G06F7/50;G06F7/57;(IPC1-7):G06F7/50 主分类号 G06F7/50
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