| 摘要 |
PURPOSE:To participate the CPU to be led to normal operation quickly, by using the memory in common use with CPU, and making agreement the internal status of CPU with simple program quickly and accurately. CONSTITUTION:The internal memory is located to a plurality of sets of CPU 1.1- 1.3, and the external memories 3.1-3.3 storing various information including history information are connected via the collation circuits 2.1a-2.3a, 2.1b-2.3b and connection is made so that CPU 1.1-1.3 can commonly use the memories 3.1- 3.3. Further, the synchronizing control circuit 7 is connected to CPU 1.1-1.3 and the circuits 2.1a-2.3a, 2.1b-2.3b, and the pushbutton switch 6 instructing leading is connected to the circuit 7. Further, when either one of CPU 1.1-1.3 is in leading, the circuit 7 is controlled with the switch 6, and the internal status of CPU 1.1-1.3 during operation is written in the memories in common use 3.1-3.3 with a simple program, and after the content is read in with CPU 1.1-1.3, CPU 1.1-1.3 are participated in operation even at pause. |
