| 摘要 |
A semiconductor memory device having a plurality of memory cells, each memory cell having two nodes, an electric potential of each node designates a stored data, comprises: a word line; a pair of bit lines; a pair of field effect transistors (FETs) connected between the word line and the nodes; a pair of diodes connected between the bit lines and the nodes; a pair of load means connected between the nodes and a first potential; and an inverter connected to the word line for driving the FETs, wherein the electrical potential of the nodes are read out by the change of the potential of the word line controlled by the inverter.
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