| 摘要 |
<p>PURPOSE:To provide the polyphase clock generating circuit capable of selecting an optional clock skew in a library to be supplied to a customer in ASIC. CONSTITUTION:A waveform-shaped clock signal 1 is inputted to a delay circuit 2 taking a means permitting customers to select. The output is frequency-divided with a ring counter circuit 3. Polyphase clock constituted by ANDing the clock signal 1 and the ring counter circuit 3 is generated. Thus, the polyphase clock taking the desired clock skew can be generated.</p> |
