| 摘要 |
PURPOSE:To detect the missing and multioscillation of clock signals in the clock signal abnormality detecting circuit. CONSTITUTION:The circuit is provided with a clock signal delay circuit 1 delaying clock signals of half duty by semi cycle, a coincidence circuit 2 comparing the levels of clock signals before and after the delay and outputting coincidence signals when both signal levels match, coincidence signal delay circuit 3 delaying the coincidence signal by the limited period shorter than one cycle, and a detection circuit 4 comparing the levels of coincidence signals before and after the delay and outputting abnormal signals when both signal levels become high. |
