| 摘要 |
PURPOSE:To improve a display ratio in one field and to reduce the size of a circuit by dividing one cycle of a write period into the number of sub fields, allocating divided respective periods as the write periods of respective sub fields and displaying from the sub field with a short display hold period successively. CONSTITUTION:The display periods of respective sub fields are shown by T, T/2, T/4, T/8, T/16, T/32, T/64, T/128 and the display of 256 gradation are performed by the combination of selected sub fields. One period F of one field is not divided to the divided sub fields and further a no display period from the end of respective sub fields to the start of the next sub field becomes short. Then, a data signal in a driving basic signal is delayed till the write timing of respective sub fields. That is, regarding the sub field F1 operating first as a reference, the data signals exist till the display start of the sub fields of F2-F8 are stored. |
