发明名称 PARALLEL ARITHEMETIC UNIT
摘要 <p>PURPOSE:To increase the speed of parallel arithmetic operation of a determinant or the like repeated at every prescribed period by plural computing elements in a controller for a robot. CONSTITUTION:Plural computing elements 13 to 15 have storage devices 16 to 18 having the same constitution and to which common storage areas are assigned, and for example, the computing element 13 periodically reads the data which are required for the operation assigned to the element 13 itself and are already updated with respect to the period, from the corresponding storage device 16 and simultaneously writes the data as the result of the operation in all storage devices 16 to 18 through a latch 204 and a data transmission line 19 only once with respect to the pertinent period and the data after the operation. This operatioin is periodically repeated. Since the single transmission line 19 is used for data write, the timing is arbitrated between computing elements by a write arbiter 301 when write points of time are overlapped; but, the parallel operation speed is increased as the result, since the data reading which occupies a large time proportion of the operation is freely performed to computing elements 13 to 15 from respective corresponding storage devices 16 to 18.</p>
申请公布号 JPH05313717(A) 申请公布日期 1993.11.26
申请号 JP19920119340 申请日期 1992.05.13
申请人 FUJI ELECTRIC CO LTD 发明人 TAKAGI AKIRA
分类号 G05B19/05;G06F9/52;G06F12/06;G06F15/16;G06F15/177;(IPC1-7):G05B19/05 主分类号 G05B19/05
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