发明名称 MATRIX ARRAY SUBSTRATE
摘要 <p>PURPOSE:To provide the matrix array substrate which can decrease element capacity by constituting the substrate in such a manner that wiring resistance can be lowered without impairing element characteristics. CONSTITUTION:This matrix array substrate is constituted by forming plural nonlinear resistance elements constituting the three-layered structure consisting of a lower metallic layer-insuator layer-upper metallic layer on a substrate 11 in an array form and disposing pixel electrodes 24 respectively in series on the respective nonlinear resistance elements. Further, the lower metallic layer consists of a first metallic layer 19 in contact with the substrate and a second metallic layer 14 formed on this first metallic layer. In addition, the second metallic layer 14 is formed to the resistance lower than the resistance of the first metallic layer 19 and the surface thereof is coated with an oxide film 16 having a high insulation characteristic. The insulator layer 21 is formed on the flank of the first metallic layer. The nonlinear resistance elements 25 are formed of the three-layered structure consisting of the first metallic layer- insulator layer-upper metallic layer, by which the above-mentioned purposes are achieved.</p>
申请公布号 JPH05313206(A) 申请公布日期 1993.11.26
申请号 JP19920115631 申请日期 1992.05.08
申请人 TOSHIBA CORP 发明人 HARUHARA KEIKO
分类号 G02F1/136;G02F1/1365;H01L49/02;(IPC1-7):G02F1/136 主分类号 G02F1/136
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